发明名称 PHASE LOCK LOOP PRECONDITIONING CIRCUIT
摘要 <p>PHASE LOCK LOOP PRECONDITIONING CIRCUIT A preconditioning circuit is inserted in series between a coded stream of data pulses and a standard commercially available phase lock loop of the type having a nonharmonic phase detector. The novel preconditioning circuit converts the input coded stream of data pulses which do not have a transition during each cell time into a stream of pulses having a transition during each data cell time to enable the nonharmonic phase lock loop to synchronize with the data cell time and to produce clock pulses synchronized with the data cell time.</p>
申请公布号 CA1137566(A) 申请公布日期 1982.12.14
申请号 CA19790338867 申请日期 1979.10.31
申请人 SPERRY CORPORATION 发明人 MOULTON, ROBERT K.;THOMPSON, JOHN W.
分类号 G11B20/14;H03L7/08;H03L7/085;H04L7/033;(IPC1-7):03L7/00 主分类号 G11B20/14
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