| 摘要 |
PURPOSE:To speed up an analysis of a fault by forecasting several sequence elements which may cause a fault mode, and storing a memory with data on a bus during the sequence execution of the elements. CONSTITUTION:Under the control of a control circuit 5, a multiplexer MX3 is changed over to the side of an internal data bus D, a predetermined trace word TSW is applied to a detection memory 4, and a write signal (e) is supplied to write 1 in the memory 4. Further, a trigger word TGW indicating a specific fault mode is set in a register previously. Then, the MX3 is connected to an external data bus D1 to operate an external equipment. Every time the TSW appears on the bus D1, the memory 4 outputs a detection pulse P to a pulse width generating circuit 8 and while a write signal C is 1, a constant-width pulse is inputted from the circuit 8 to a memory 10 to write the sequence data on the bus D1 in the memory 10. Once the bus D1 has a fault, fault data is compared with the TGW in the register 1 by a comparator 2 and data near the TSW in the memory 10 is displayed on a display part 11. |
