发明名称 UPC CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To simplify circuit constitution, to reduce a hardware quantity, and to reduce cost by judging abnormality from the result of comparing an interval between cells at each virtual path identifier VPI and an interval between specific peak cells, with respect to a UPC circuit monitor-controlling the flow rate of continuously arriving cells. SOLUTION: VPI is separated from the transmitted cells to be sent to an OR gate 103 through respectively corresponding VPI identification parts 121 to 12N, to take a logical sum to send it to a ring counter 104 and a counter value storing part 105. An address generation part 106 sends an address generated according to VPI to a counter value storing part 105. A calculation part 107 obtains a difference between a count value at the point of a cell arriving time from the counter 104 and a count value in the part 105. A comparing and judging part 109 compares this difference value and the output of a peak cell interval storing part 108 and when the difference value is larger than a peak cell interval, judges the cell held in a cell delay part 110 to be normal and permits the passing of the cell through a cell control part 111.</p>
申请公布号 JPH10145393(A) 申请公布日期 1998.05.29
申请号 JP19960312701 申请日期 1996.11.08
申请人 TOYO COMMUN EQUIP CO LTD 发明人 CHIKARAISHI TETSUYA
分类号 H04Q3/00;H04L12/28;(IPC1-7):H04L12/28 主分类号 H04Q3/00
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