发明名称 SORTING AND DECIDING CIRCUIT FOR ANALOG VALUE
摘要 PURPOSE:To avoid sorting and decision wherein >=2 sections overlap, by providing a means which determines outputs of comparators for comparing an analog signal value to be sorted with comparison reference values as one logical value output by one logical gate. CONSTITUTION:Comparison reference values are so set that 1>2>->n. An analog signal to be sorted is compared with the comparison reference values by respective comparators in a comparing circuit part 20, and logical operation is performed by the noninverter of the 1st logical gate part 22. Then, the result is applied to the 3rd logical gate 26 through the 2nd logical gate 24 for inhibiting one of two adjacent sections, and a sorting and deciding output is sent out at the point of time of a timing signal. Even when the analog signal value to be sorted has the same level with one comparison reference value, the non-inverter of the 1st logical gate part 22 decides on a logical level, so that threshold levels of the 2nd and 3rd logical gate parts 24 and 26 have no relation, so that the sorting and decision wherein two sections overlap to each other are never done.
申请公布号 JPS57186113(A) 申请公布日期 1982.11.16
申请号 JP19810071012 申请日期 1981.05.12
申请人 TOKYO SHIBAURA DENKI KK 发明人 FUJIWARA KUNIHIRO;TAKAYAMA HOZUMI
分类号 G01D1/14 主分类号 G01D1/14
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