| 摘要 |
A circuit for representing 9-bit words from 8-bit words for converter control having a digital comparator (4) which compares a nominal value and an actual value of the delay angle (control angle ( alpha ) which is represented in binary code) and to which the nominal value is specified via a digital input (1), said nominal value being supplied via a programmable user memory. In this case, a first 8-bit word and a least significant bit (LSB) of a second 8-bit word are entered sequentially via the digital input with a buffer store and a 9-bit output, and the nominal value of alpha is thus specified, for example from the control voltage (UE) of the converter, as a 9-bit word. Arranged downstream of the digital input (1) is a comparator circuit (2) having a digital comparator (21) with 9 first inputs (A1 to A9) to which the 9-bit word is supplied as a storage address bit by bit, and having an arrangement of 9 individual dual-in-line switches (22) which are connected to in each case one of 9 second inputs (B1 to B9) of the digital comparator and on which an address is set as the mean value of the control range of alpha , which address is higher by one least significant bit than the memory address in binary code or binary-coded-decimal code and furthermore having the programmable 8-bit user memory (3) to which the first 8-bit word (branched off from the digital input) is addressed, and the output (A<B) of the digital comparator (21) with the outputs of the user memory (3) form comparison inputs (A) to inputs (B) of the 9-bit digital comparator (4). <IMAGE>
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