发明名称 BUS CONNECTING SYSTEM
摘要 PURPOSE:To reduce the access to a main memory by operating only the hardware function without the aid of software in the bus connecting system of the multiprocessor system of multibus constitution. CONSTITUTION:The address and data generated from a processor 1 (2) pass a bus connecting system 3 (4), and each bus connecting system 4 connected to a main memory 5 is accessed; and if data corresponding to a required address is stored in the memory of the system 4 itself, the access to this data is inhibited. If the data write to the main memory results in success, this data is abandoned. If this data write results in failure, the inhibition is released.
申请公布号 JPS57182862(A) 申请公布日期 1982.11.10
申请号 JP19810069026 申请日期 1981.05.08
申请人 NIPPON DENKI KK 发明人 OOMORI KENJI
分类号 G06F13/36;G06F12/00;G06F12/02;G06F15/16;G06F15/177 主分类号 G06F13/36
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