| 摘要 |
PURPOSE:To obtain a semiconductor memory capable of microminiaturization and having preferable characteristics by separating an area of MISFET rows via semiconductor or conductor layers of the prescribed potential. CONSTITUTION:Rows of MISFET3 forming a memory array are formed on a gate oxidized film 2 on a P type silicon substrate 1, and polycrystalline silicon layers 4 are formed between the rows. A polysilicon floating gate 5 perpendicularly crossing the layer 4 and a control gate 6 as a word line are formed on the film 2 between the layers 4, and the intermediate between the gates become N<+> type source or drain region 7. The layer 4 is secured to a potential (ground level) not inverted at the surface of the semiconductor substrate under the layer 4, thereby the transistor groups can be isolated from each other. |
