发明名称 |
Correction circuit for approximate quotient. |
摘要 |
<p>An approximate quotient-correcting circuit wherein ah approximate quotient QH, a divisor D, and the least significant bit of the fraction part of a dividend N are read out; the approximate quotient QH and the divisor D are multiplied; it is decided that the lower m digits of QH x D are not all 'O' and that the m-th significant bit of QH x D is coincident with the m-th significant bit of N; and when the result of the decision is positive, QH - 2-m is provided as a quotient.</p> |
申请公布号 |
EP0063361(A2) |
申请公布日期 |
1982.10.27 |
申请号 |
EP19820103151 |
申请日期 |
1982.04.14 |
申请人 |
HITACHI, LTD. |
发明人 |
INAGAMI, YASUHIRO;NAGASHIMA, SHIGEO;OMODA, KOICHIRO;TORII, SHUNICHI |
分类号 |
G06F7/483;G06F7/508;G06F7/52;G06F7/525;G06F7/527;G06F7/535;(IPC1-7):06F7/52 |
主分类号 |
G06F7/483 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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