| 摘要 |
PURPOSE:To remove the jitter (variation of time axis) in a color video signal by delaying the color video signal to be supplied to an A/D converter by one horizontal period, and simultaneously delaying the response of a PLL circuit by one- division. CONSTITUTION:A delay circuit 21 delays a color video signal Sc from an input processor 2 and outputs the delayed signal to an A/D converter 3. The PLL circuit 12 consists of a phase comparator 31, a ''0'' division holding circuit 32 holding the compared output from the circuit 31, a VCO33 controlled by the held output, a divider circuit 34 dividing the oscillation output from the VCO33 into 1/N frequency. The divided output from the circuit 34 and the output of a burst gate circuit 11 are supplied to the circuit 31, so that the oscillation output from the VCO33 is made a pulse Pw with the jitter delayed by one horizontal period. Thus, when a digital signal Sd is written in a memory 4, the jitter is removed from the signal. |
