| 摘要 |
PURPOSE:To increase the efficiency of designing and manufacturing an IC by respectively forming an I<2>L gate output n<+> type layer, a connecting window, and an internal wire with individual masks and further orming a P type layer in the internal wire installing region by the n<+> type layer. CONSTITUTION:A mask 14 is used to form an N<+> type layer for gate output, a mask 15 is used to form a connecting window, and a mask 16 is formed to form the internal wire. According to this structure, transistor 5''-11'' are formed to construct a T type FE circuit. Then, the internal wire can be performed only linearly, the interval of the I<2>L gate can be reduced, and an occupying area per gate can be reduced in large scale circuit. Since only the collector used actually may be diffused, the characteristics of the I<2>L gate can be improved when the number of the outputs is less. Further, a p type layer is formed in the region capable of installing internal wires, the region is applied with the lowest voltage in the chip, and the n<+> type layer crossing the aluminum wire can be installed at the desired position with the mask 14. According to this structure, the complication of the internal wire and the increase in the length of the wire can be prevented, and an IC can be efficiently designed and manufactured with small area. |
