发明名称 Method of halting a pulse width modulation inverter.
摘要 <p>A pulse width modulation inverter loaded with a three-phase AC motor (6) is halted at a time when all of pulse width modulation signals applied to three positive side or three negative side main thyristors (10, 20, 30; 15, 25, 35) in three-phase bridge connection constituting the inverter become in high level states.</p>
申请公布号 EP0062348(A2) 申请公布日期 1982.10.13
申请号 EP19820102943 申请日期 1982.04.06
申请人 HITACHI, LTD. 发明人 TAMURA, KAORU;AIZAWA, HIDETOSHI
分类号 H02M7/48;H02M7/527;(IPC1-7):02M7/515 主分类号 H02M7/48
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