| 摘要 |
PURPOSE:To shorten the width of write pulse and to prevent malfunctions in reading, by installing a current switch circuit which uses the electrical potential of bit line as a base input and by impeding the read current supply to the high leel bit line side at normal condition time. CONSTITUTION:When a cell 1 is selected at reading condition, a transistor Q2 is turned on and bit lines B0 and B1 become high and low levels, respectively, and form a current switch circuit. Also, transistors Tr1 and Tr2 whose collectors are intersectionally connected to bit lines B0 and B1 become on and off, respectively, and the read current is supplied to the transistor Tr1 from the line B1 side. However, since a transistor Q4 of the cell 1 at the B1 line side is turned off, charges accumulated in the cell 1 do not increase because the supply of read current to the cell 1 is impeded, and a template becomes unnecessary, and thus, the width of write pulse can be made small. In the same way, erroneous readings based on transient currents due to parasitic capacities at the time of switchings of the content in the same or different cell are prevented, and thus, this circuit becomes an RAM which can make high speed writing and which is a highly reliable I<2>L, etc. |
