| 摘要 |
PURPOSE:To surely perform program debug after assembling, by fetching a data fetched to a CPU to the 2nd memory at the same time through the address designation from a CPU and resetting the CPU when an undefined instruction code is detected. CONSTITUTION:In debugging if a program after assembling is normal on an actual machine, first an address corresponding to an input instruction code is picked up when the instruction code is inputted to a CPU1 from a console or the like, the address is applied to a memory 13 through an address bus, and a read instruction code is fetched to the CPU1 via a data bus 8 and stored in a discrimination circuit 14. The circuit 14 discriminates if the stored data is a defined instruction code and it outputs 0 or 1, and the code is an undefined instruction code, an FF20 is set and the undefined data is stored in an FF18 and the address is stored in an FF16. The output of a NAND gate NAND2 resets the CPU1 and monitors the data. |
