| 摘要 |
PURPOSE:To improve access control system by resetting patrol access to address (O) at CPU starting and synchronizing the patrol access with CPU access. CONSTITUTION:When a starting signal Sa is inputted to a memory access control device MCU, flip-flops FFs F7, F8, F9 are set up successively and a signal SO to set an address counter (not shown in the drawing) of MCU to (O) is generated. When a service processor SVP sends a starting signal Sb to a CPU, FFs (F1, F2, F3) are set up successively and an AND gate G1 sets up a FF (F4) when the Q output of the F2 and -Q output of F3 are in the H level. Then a FF (F6) is reset and a gate circuit G3 generates an output of the H level by receiving the Q output of the F6 and the Q output of the F7, so that an address (O) setting signal SO is outputted again from a FF (F11). |
