Data-processing apparatus having improved interrupt handling processor

摘要

The data-processing apparatus of this invention comprises a central processing unit (hereinafter referred to as the "CPU"), and a plurality of a groups of memory units in the CPU to be applied as a general register set. The groups of memory units are provided in a number which is equal to the number of interrupt programs and each group has been previously supplied with information on the individual interrupt programs (such information includes, for example, data on entry address, program status word, etc.). The present data-processing apparatus further has a general register-set pointer provided in the CPU. Where the general register set pointer is supplied with a particular numerical value, the corresponding one of the memory unit groups is selectively used as a general register set.