| 摘要 |
PURPOSE:To make the titled memory highly dense and the have large capacity capable and to stabilize the operation of the titled memory, and, at the same time, to prevent the PN junction from forward biases, by using two complementary type FET cells. CONSTITUTION:The diagram shows that, when a semiconductor integrating memory is made by using memory cells using two MOSFETs and two external power sources, a P type channel 1st MOSFET are configured by 101-104 and an N type channel 2nd MOSFET is configured by 105-108. The memory cells which store electric charge in a parasitic condencer connected to P type electrodes 103, 108 which are under electrically floating condition, are configured with these two. To N type electrodes 104, 107 of the these memory cells, the higher external power source 113 is connected, and, therefore, any voltage which are higher than the external power source is not impressed upon a reading bit line 110. |
