发明名称 Data processing system.
摘要 <p>A data processing system comprising a plurality of host processors (12) connected to a peripheral device subsystem (10) including a control unit (11) and a plurality of peripheral devices (13). The peripheral device subsystem enables its peripheral devices to operate asynchronously with respect to attached host processor through the use of a managed buffer (15). In a preferred buffer mode of operation, all data of each record being transferred can be resident in a buffer before transfer to a device. For a host processor to device write transfer, receipt of such a record by the buffer results in the subsystem signaling to the host processor a completion of a transfer to an addressed device, even though the device has received none or only part of the data. A host SYNCHRONIZE command synchronizes buffer operations to host operations. Completion of transfer is then not signaled until after the buffer has transferred the data to the device. This enables the system to switch to a synchronous mode of data transfer in which data signals are simultaneously transferred between the buffer and the host processor and the peripheral device, in the event allocatable buffer space is insufficient to enable operations in the buffer mode. </p>
申请公布号 EP0059794(A2) 申请公布日期 1982.09.15
申请号 EP19810110074 申请日期 1981.12.02
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 MILLIGAN, CHARLES ALLEN;VIDEKI II, EDWIN RAYMOND;YATES, WINSTON FAY
分类号 G06F3/06;G06F5/06;G06F13/10;G06F13/12;(IPC1-7):06F3/04 主分类号 G06F3/06
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