| 摘要 |
PURPOSE:To shorten the time for the signal read from a memory cell, by dividing a signal line to arrange a sense amplifier of the second stage in the center of a sense amplifier row of the first stage. CONSTITUTION:Address circuits 6 and sense amplifier circuits 2 of the first stage are arranged at constant intervals narrower than those of memory cells 1 on the side of the longitudinal row of memory cells 1, and a sense amplifier circuit 3 of the second stage is inserted to a space made by the difference of constant intervals between memory cells and circuits 2, and a signal line from sense amplifiers of the first stage to the sense amplifier of the second stage is divided into signal lines 10a and 10b, and such switch is inserted to the sense amplifier of the second stage that only one selected signal line is connected to the sense amplifier of the second stage. By this constitution, sense amplifier circuits of the first stage and the sense amplifier of the second stage are connected to only one of signal lines 10a and 10b connecting them, and thus, capacities and resistances of signal lines are reduced, and the signal read time is shortened. |
