发明名称 POLYPHASE PARALLEL CHOPPER CONTROLLING DEVICE
摘要 PURPOSE:To simplify the controlling circuit by always driving a plurality of chopper main circuits and separating a defective main circuit at the defective time. CONSTITUTION:First and second chopper main circuits 14, 15 always operate, when the first chopper main circuit 14 becomes defective due to a certain reason, a chopping malfunction detector 18a operates, and the gate of a switching circuit 23 is closed by the output of the detector 18a, the gate of a low-level adder+switching circuit 30 is opened and the signal is simultaneously fed to the gate signal generator 19a of a shortcircuit thyristor 7a. Thus, the thyris fot 7a is conducted, and an NFB 11a is tripped. On the other hand, a comparator 24 compares the output of the circuit 30 with the output of a current detector 16 to produce first and second chopper main circuit firing pulses and to produce the first and second chopper main circuit deenergizing pulses via a differentiating circuit 26.
申请公布号 JPS57138865(A) 申请公布日期 1982.08.27
申请号 JP19810023325 申请日期 1981.02.18
申请人 MITSUBISHI DENKI KK 发明人 KOJIMA TOORU
分类号 H02M3/135;H02M3/158 主分类号 H02M3/135
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