发明名称 BURIED-CHANNEL TYPE MIS FIELD EFFECT TRASISTOR
摘要 PURPOSE:To ease concentrated field and improve dielectric strength characteristics of an MIS transistor, by providing an electrode for a field. CONSTITUTION:A source region 4, a channel region 2, an offset region 3, and a drain region 5 are arranged in order on an insulative substrate 1. A gate electrode 6 is provided on the channel region 2 with an interval Gg apart. A source electrode 7 and a drain electrode 8 are provided. Therminals 9, 10, 11 are drawn from each electrode. An MIS transistor is made as mentioned above. A field electrode 31 is provided for both the channel region 2 and offset region 3 with an interval Gf apart larger than the interval Gg. It is connected to the gate electrode 6. Or, a field electrode 51 is provided for both the drain region 5 and offset region 3, and connected to the drain electrode 8. Or both the field electrodes 31, 51 are provided. This eases field concentration at boundaries 13, 14.
申请公布号 JPS57134973(A) 申请公布日期 1982.08.20
申请号 JP19810021304 申请日期 1981.02.16
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 AKITANI MASAHIRO;NAKAJIMA SADAO;OOWADA KUNIKI
分类号 H01L21/336;H01L27/12;H01L29/78;H01L29/786 主分类号 H01L21/336
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