发明名称 MULTI-TIMER DEVICE
摘要 <p>PURPOSE:To obtain a timer having high accuracy, by continuously carrying out the timer survice to a timer which stores the next address in case the timer service time exceeds the duration of the clock pulse cycle to the timer. CONSTITUTION:A timer arithmetic control circuit CC, a reversible counter RVC and a detecting circuit PD form a multi-timer device. The circuit CC starts its operation at a moment when the logic of the status signal changes from 0 to 1 on a signal line 8, and continues the timer service while the logic is kept at 1. At the same time, a command pulse is delivered with every end of the timer service, and the numerical value 1 is subtracted from the count value of the counter RVC. The clock pulses supplied form a signal line 1 are added together by the counter RVC.</p>
申请公布号 JPS57120140(A) 申请公布日期 1982.07.27
申请号 JP19810006108 申请日期 1981.01.19
申请人 MITSUBISHI DENKI KK 发明人 NAKATSUKA SHIGEO;ISHIZAKA MITSUHIRO;KAKUNO TAKANE;ICHIHASHI TACHIKI
分类号 H04L29/02;G06F1/14;G06F11/30;G06F13/00 主分类号 H04L29/02
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