发明名称 LINE BUFFER CONTROLLER
摘要 PURPOSE:To quicken wite-in processing speed and to simplify the circuit, by making write-in directly not via one character buffer, in writing a serial data to a line buffer from a CPU. CONSTITUTION:Data C-DATA is transmitted from a CPU in the order of numerals shown in a-1, b-1. As an example of lateral print, every time the C-DATA is transmitted, a row address counter 203 is counted, and a column address counter 204 is counted with the carry. Further, a character address counter 202 is counted with the carry. On the other hand, the output of the counter 204 is transmitted to a decoder 205 to produce a line buffer write signal WA. An output CHA of the counter 202 and an output RA of the counter 203 are address input to a line buffer 201. Thus, the data is stored in the buffer 201 in the form of a-2.
申请公布号 JPS57114984(A) 申请公布日期 1982.07.17
申请号 JP19810001972 申请日期 1981.01.09
申请人 TOKYO SHIBAURA DENKI KK 发明人 KOMATSU AKIRA
分类号 G06F3/12;G06K15/00;G06K15/02;G06K15/10 主分类号 G06F3/12
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