| 摘要 |
PURPOSE:To enable the test of ROM data check circuit, by storing error state data to an existing ROM at all times. CONSTITUTION:When a selector switch 1 is selected to the test side, ''1'' is inputted from a control power supply VC2 to a test mode register 2, and ''0'' is inputted from a control power supply VC1 at operation. ''0'' of the most significant address A0 in the address of an ROM5 is given to an ROM5 from the register 2 according to the clock signal CLK. The switch 1 gives start signal to a control circuit 3 at test, address signals A1-An are given to an address register 4, the error data stored in the error data area ERD of the ROM5 is read out at a check circuit 6 for checking. The A0 of the normal data is stored in the data area DAT of ''0''. |
