发明名称 RE-CHARGING CIRCUIT
摘要 PURPOSE:To prevent the lowering in sensitivity of amplifier, by storing the charge on bit lines, when a drive timing pulse has a negative noise, in a sense amplifier of MOS dynamic RAM. CONSTITUTION:A driving timing pulse phi1 is at H level in timing P7, a bit line HA of a node A and a bit line HB of a node B are precharged to a power supply voltage V, and a node C is charged to V-VTH through a transistor T6. When phi5 changes from H to L level after phi4 is at L level, a negative noise is applied to the phi4 through a capacitor C5, the node C is lowered negative with a C1 and charges are applied through the T6. Further, when the phi4 returns to L level, the node C is increased to the level more than V-VTH with the C1. Thus, no charge is moved to the node C from a line HB through the T6, and the sensitivity of the sense amplifier is not lowered.
申请公布号 JPS57109187(A) 申请公布日期 1982.07.07
申请号 JP19800188803 申请日期 1980.12.25
申请人 MITSUBISHI DENKI KK 发明人 TANIGUCHI MAKOTO
分类号 G11C11/409;G11C11/4094 主分类号 G11C11/409
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