发明名称 APARELHO DE CONTROLE AUTOMATICO DE TRENS
摘要 <p>In an ATC apparatus, an ROM stores a plurality of parameters used for identification of an ATC signal. These parameters are sequentially read out from the ROM and applied to a ring-arithmetic type frequency pattern generating circuit to be converted into a plurality of pulse trains having respective reference frequencies. These pulse trains are then sequentially applied to a ring-arithmetic type frequency comparison circuit and are compared with the frequency-modulated ATC signal in a time division mode so as to identify the speed limit indicated by the ATC signal. The frequency pattern generating circuit generates also a pulse train corresponding to the speed limit. The frequency comparison circuit executes also comparison between the frequency of the pulse train indicative of the speed limit and that of a pulse train indicative of the detected train speed, and an ATC brake instruction signal is generated when the result of comparison proves that the detected train speed exceeds the speed limit. The frequency pattern generating circuit and the frequency comparison circuit are included in a single LSI.</p>
申请公布号 BR8106342(A) 申请公布日期 1982.06.22
申请号 BR19818106342 申请日期 1981.10.01
申请人 HITACHI LTD 发明人 UENO MASAHIRO;TASHIRO KOREFUMI;TOYOTA EIICHI
分类号 B60L3/08;B61L3/00;B61L3/08;(IPC1-7):G05B11/01 主分类号 B60L3/08
代理机构 代理人
主权项
地址