发明名称 CLOCK FORMING CIRCUIT FOR STOP WATCH OF ELECTRONIC WATCH
摘要 PURPOSE:To reduce the number of transistors used and make uniform as far as possible the distance between adjacent positions of signals that are to be crossed out by simplifying the constitution of a control circuit of signal formation for a stop watch. CONSTITUTION:The control circuit for crossing out 28 shots per second out of 128Hz frequency division signal 423 is provided with an inverter 401, gates 402- 404, inverter 405 and FF406, to form 100Hz signal for a stop watch. The above mentioned crossing out operation is provided with a decimal counters FF412- 415 that count decimal figures 0-9 with the speed of 1/100 seconds order for a decimal point, a group of gates 416-419 that detect a specified state from data at the speed of 1/100 seconds order for a decimal point, a decimal figures, 0-9 at the speed of 1/10 seconds order for a decimal point, and decimal number detecting gates 430-431.
申请公布号 JPS5798890(A) 申请公布日期 1982.06.19
申请号 JP19800175180 申请日期 1980.12.11
申请人 SUWA SEIKOSHA KK;SHIMAUCHI SEIKI KK 发明人 YOSHINAMI TOSHIMASA
分类号 G04F5/00;G04G3/02 主分类号 G04F5/00
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