发明名称 MEMORY ACCESS CONTROLLING CIRCUIT
摘要 PURPOSE:To easily control an address of a memory device constituted of memory chips having different number of address terminals respectively, by providing each specific boundary value setting means, comparing circuit and gate circuit. CONSTITUTION:This device is provided with a means for setting a mounting boundary value B showing a sort of the first and second memory chips, a comparing circuit 1 for comparing and discriminating this boundary value B and a mounting address signal A, selecting circuits 5, 6 for dividing a 2n input address signal into 2 by a selecting signal C and outputting it as an n/2 output address signal, and gate circuits 2-4 connected to its prescribed input terminals. In this state, when the value of the mounting address signal A has exceeded the boundary value B, the eight signal of a memory address signal is supplied to the prescribed input terminal, and when the value of the mounting address signal A is the boundary value B or less, a prescribed address signal of the memory address signal is supplied to the prescribed input terminal.
申请公布号 JPS5798172(A) 申请公布日期 1982.06.18
申请号 JP19800173015 申请日期 1980.12.08
申请人 FUJITSU KK 发明人 SHIBATA TOMOHITO;KOBAYASHI MASAAKI;HASHIMOTO SHIGERU
分类号 G06F12/06;G11C8/12;(IPC1-7):11C8/00 主分类号 G06F12/06
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