发明名称 TIMER CIRCUIT
摘要 PURPOSE:To use a timer circuit for plural purposes with a small number of circuit elements, by providing a preferentially accepting circuit in the timer circuit of an electronic watch. CONSTITUTION:When start signal lines 4 to a preferentially accepting circuit 2 are enabled, an earlier one of enable signals on signal lines 4 is stored in an acceptance storage circuit 8 by a set clock input signal 9 of the circuit 8 which is inputted synchronously with this enabling. Simultaneously, a timer start signal generating circuit 11 generates a timer start signal 6 and inputs it to a timer part 1. The timer part 1 starts the operation in accordance with a clock 3 and transmits a timer output signal 7 to a timer signal distributing circuit 10 after a prescribed time. The circuit 10 transmits the signal to a timer output line 5 corresponding to the enable signal, which comes first, out of signals on signal lines 4 in accordance with storage information of the circuit 8.
申请公布号 JPS5795723(A) 申请公布日期 1982.06.14
申请号 JP19800171568 申请日期 1980.12.05
申请人 SUWA SEIKOSHA KK 发明人 SUZUKI TOSHIMOTO
分类号 H03K17/28;(IPC1-7):03K17/28 主分类号 H03K17/28
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