发明名称 AMPLIFYING CIRCUIT
摘要 PURPOSE:To obtain a single-channel MOS amplifying circuit of a high gain and a wide operation range, by cascading the first amplifying stage, a level converting stage, the second amplifying stage, and output buffer stage successively to constitute the circuit. CONSTITUTION:A differential input stage 11, an input converting stage 12, the first amplifying stage 13, a level converting stage 14, the second amplifying stage 15, and an output buffer stage 16 are cascaded successively to constitute an operational amplifier. MOSFETs Q1-Q9 are the depletion type, and MOSFETs T1-T16 are the enhancement type. A substrate bias effect compensating circuit where the FETQ5 and FETT12 are connected in series is connected to the load FETQ6 of the second amplifying stage 15; and when the drain voltage of the driving FETT13 rises, the conductance of the FETT12 is lowered to raise the gate voltage of the FETQ6.
申请公布号 JPS5792910(A) 申请公布日期 1982.06.09
申请号 JP19800167471 申请日期 1980.11.28
申请人 FUJITSU KK 发明人 GOTOU GENSUKE;FUJII SHIGERU
分类号 H03F3/343;H03F3/34;H03F3/345;H03F3/347 主分类号 H03F3/343
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