| 摘要 |
<p>PURPOSE:To reduce the size of a memory and to eliminate malfunction by forming a writing and an erasing part of transistors (TR) for storage separately from a main part. CONSTITUTION:Both MOSTRs Q1 and Q2 for storage and selection are divided into an MOSTRQ11 for readout and a writing and erasure part Q12, and TRs Q21 and Q22 for selection. For writing operation, a Y, Y' and an X are held high for a selected cell to turn on the TRs Q21, Q22 and Q3, and a high voltage is applied to the drain of the Q11 and the diffused area WED of the Q12. Since a control gate CG is held at level zero, electrons are extracted from the floating gate FG of the Q12 to the area WED, thus performing the writing operation. In a half-selected or unselected cell, the Q22 and/or Q3 are off and the high voltage is not applied to the area WED of the Q12, so that the writing operation is not performed. To erase all data at a time, the Y held at O, and Y, X and CG of every cell are held at high levels, and consequently electrons are applied from the WED to the FG of the Q12. Thus, erasure is carried out.</p> |
