发明名称 MULTIPLE STACK DEVICE
摘要 PURPOSE:To realize the stack mechanism of a high-level language computer efficiently by exercising control so that data required for arithmetic processing resides in a register stack in every internal state without fail. CONSTITUTION:A multiple stack device is equipped with a means 1 of prescribed internal states, resister stacks RS21-RS23 and RS41-RS43 controlled on FIFO basis, significant-state display means 31-33 for respective blocks, an address specifying pointer 40 for the blocks, a main storage device 6 stored with data from the RS on FIFO basis, and address pointers AP71 and AP72 which correspond to the internal states of up-to-date significant data area of the device 6. Then, a control means 8, when each RS has no empty block as a result of push operation, expels the oldest block of the RS to the device 6 by the indication of the AP and, when the RS obtains an empty block as a result of hop operation, fetches data from the device 6 to the oldest empty block. Therefore, data required for arithmetic control resides in the RS in every internal state without fail.
申请公布号 JPS5792475(A) 申请公布日期 1982.06.09
申请号 JP19800166091 申请日期 1980.11.25
申请人 NIPPON DENKI KK 发明人 YAMAMOTO MASAHIRO
分类号 G11C7/00;G06F11/00;G06F12/08 主分类号 G11C7/00
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