发明名称 OUTPUT BUFFER CIRCUIT
摘要 PURPOSE:To prevent a latch-up state by employing a push-pull circuit, constituted by connecting N channel MOS transistors (TR), as the final stage of an output buffer consisting of complementary MOS TRs. CONSTITUTION:At the final stage of an output buffer circuit, N channel MOS TRs Q4 and Q3 are connected in series between a power source Vcc and an earth point. As an H-level signal is inputted to an input terminal 11, the H-level signal is applied to the gate of the Q3, and an L-level signal inverted by an inverter 22 is also applied to the Q4 to turn on the Q3, so that an output terminal 22 is held at a level L. When an L-level signal is inputted to the input terminal 11, the Q4 turns on and the Q3 turns off, outputting an H-level signal to the output terminal 22.
申请公布号 JPS5783931(A) 申请公布日期 1982.05.26
申请号 JP19800160217 申请日期 1980.11.14
申请人 TOKYO SHIBAURA DENKI KK 发明人 NODA MAKOTO
分类号 H03K19/0175;H03K19/003 主分类号 H03K19/0175
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