发明名称 INSTRUCTION PRE-FETCH CONTROL SYSTEM
摘要 PURPOSE:To ensure an economical output of the detection output of the prescribed conditions corresponding to the instruction to be pre-fetched, by discontinuing the pre-fetch function of a pre-fetch control circuit with the detection output of the prescribed conditions when the instruction of a pre-fetch control circuit is prefetched. CONSTITUTION:An instruction (1000) is stored in a register 6, and an address 1001 is set at an address register 10 under execution of an operation. Then the instruction (1001) is read out of a main memory 1. Thus a control circuit 2' pre-fetches the instruction and stores it in a pre-fetch buffer 3-1. A condition detecting circuit 4' supplies the address 1001 and decides the satisfaction of conditions of either one of an address exception, a storage protection exceptin, an address coincidence, etc. Then the detection output (1001) is stored in a condition detection register 7 and also transmitted to a pre-fetch stopping circuit 11 to stop the function of the circuit 2'. As a result, the address setting of the register 10 is held to eliminate the installation of a control buffer, etc. Thus the detection output of the prescribed conditions is delivered consecutively.
申请公布号 JPS5775356(A) 申请公布日期 1982.05.11
申请号 JP19800151187 申请日期 1980.10.28
申请人 FUJITSU KK 发明人 HOSHI FUMIO;SATOU MASAO
分类号 G06F9/38;(IPC1-7):06F9/38 主分类号 G06F9/38
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