发明名称 OUTPUT CIRCUIT FOR RESET RELEASE TIMING
摘要 <p>PURPOSE:To form an output circuit with a small number of elements by controlling the output impedance of a drive circuit based on the value of a register. CONSTITUTION:An output circuit for reset release timing consists of clocked inverters (drive circuits) 7 and 8, a capacitor 2, a Schmitt trigger circuit (comparator) 3, a reset release timing output circuit main body containing a two input AND gate 4 and a 4-bit binary counter 5, and a register 9. Then a signal of a low level is supplied to the register 9 when a system is working. Thus, the drive circuit 8 becomes active and a signal (d) is slowly lowered by the output impedance of the circuit 8 and the capacitor 2 when the system is started by a signal (a). Furthermore, the desired waiting time is secured even for each of plural oscillation circuits. Thus, the number of elements can be decreased less.</p>
申请公布号 JPS63200222(A) 申请公布日期 1988.08.18
申请号 JP19870032845 申请日期 1987.02.16
申请人 MITSUBISHI ELECTRIC CORP 发明人 KUROIWA MICHIAKI
分类号 G06F1/04 主分类号 G06F1/04
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