| 摘要 |
PURPOSE:To obtain a simple latch circuit which measures the value of counter at time change of two signals, by taking an output of logical synthesis of outputs between a specific storage means and a differentiation circuit as a trigger and storing the count value of the count means. CONSTITUTION:A count means 100 driven by a specified clock, a storage means 400 storing the level change in an external input pulse A, and a differentiation circuit 500 detecting the level change of other input pulse B, are provided. Further, a logical circuit which synthesizes the output of the circuit 500 and the means 400, and the 2nd storage means 200 storing the count value of the means 100 taking the change of output as a trigger, are provided. For example, a D latch circuit which is set through the change in the input pulse A and reset after a prescribed time is used as the storage means 400 to give priority to the time change of the input pulse A having steep state change than the time change of another input pulse B. |
