发明名称 NONOLITHIC MEMORY CHIP PROVIDED WITH CORRECTING FUNCTION
摘要 PURPOSE:To output a corrected data to the outside of a chip, and also to rewrite the corrected data to a call, by correcting an error through making a cell belonging to a row line a checking block. CONSTITUTION:For instance, in case when a row line 221 has been activated, a cell of a cell matrix 1 belonging to the line 221, and all cells of a matrix 4 for a check bit are read out and are stored in a data register 5 and a check bit register 9. An output 250-n of the register 5 is inputted to a correcting register 6 and a syndrome generator 10. In the generator 10, a syndrome is generated and is inputted to a correcting circuit 11. An output 280-k of the circuit 11 is inputted to the register 6 and a check bit correcting register 12. In the register 6, for instance, if a (j) bit is an error, an error data 25j is inverted, and is stored in the register 6. An output of the register 6 passes through a mixture store register 7, and in a data outport one bit is outputted to the outside of a chip, and a correct answer data is written.
申请公布号 JPS5771596(A) 申请公布日期 1982.05.04
申请号 JP19800146548 申请日期 1980.10.20
申请人 FUJITSU KK 发明人 TAKAMURA MORIYUKI;OKAZAKI SUSUMU
分类号 G06F11/10;G11C29/00;G11C29/42 主分类号 G06F11/10
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