| 摘要 |
PURPOSE:To shorten a processing operation for scanning operation by outputting the on-off signals of data keys and function keys selectively according to the least- significant-digit bit signal of a row address signal. CONSTITUTION:Row addresses m0-m7 of a matrix circuit 1 are selected by signals decoding the high-order three-bit signals AD3-AD1 of column address signals AD, and scanned. Further, the least-significant-digit bit signal AD0 is supplied as a selector control input to a selector 3; when the row address signal AD is even-numbered, an on-off signal iA regarding a data key having a row address corresponding to the signal AD is led out, and when odd-number, the on-off signal iB of a function key is led out. For this purpose, the row address signal is increased by +1 at a detection side to obtain a couple of on-off signals of a data and a function key. |
