| 摘要 |
PURPOSE:To realize the use of a normal access process as it is, by carrying out the replacement of a memory address in N times overlap to an operator having the 1/N processing capacity. CONSTITUTION:If the processing capacity of an operator 12-B is 1/5 capacity of an operator 12-A, the operator 12-B reads the data of memory registers 11-R3 and 11-R4 to set the result to a memory register 11-R5. In this case, address replacing steps AU-31-AU34 plus AU-41-AU-44 to be originally generated at the registers 11-R3 and 11-R4 are ignored, and the 5th address replacing steps AU-31' (equivalent to original AU-35) and AU-41' (equivalent to original AU-45) are regarded to be effective. As a result, the registers transmits repetitively element data 1-8 on the same address without progressing 9, 10, 11-after the data 1-8. |
