发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To enable the evaluation test for the characteristics of a function circuit by using a plurality of input pins of the function circuit and an input pin for originally necessary initial reset for an IC also as the input pin of a test signal. CONSTITUTION:A reset signal is applied to a pin T1R in synchronism with the energization of a power source, a latch circuit 14 is reset, a decoder 15 selects a normal mode, its output is suplied through a gate 16 to a function circuit 17, and an original operation is performed. On the other hand, a gate 12 delivers a pulse at the time of completing the counting in a timer 11, the inputs of the pin I1-In are stored in a latch circuit 14, are decoded by a decoder 15 to select a test mode, and a corresponding signal is applied from a testing circuit 18 to the function circuit 17 to perform the evaluation test for the characteristics of a function block. When a reset signal is applied again to the pin T1R at the time of completing the test, the function test 17 is set to normal mode until the timer 11 again completes the prescribed counting. With this configuration, the evaluation test for the characteristics of the function circuit 17 can be performed without any pin exclusive for the test.
申请公布号 JPS5745944(A) 申请公布日期 1982.03.16
申请号 JP19800121398 申请日期 1980.09.02
申请人 TOKYO SHIBAURA DENKI KK 发明人 KAWASAKI SOUICHI;SUZUKI SOUICHI
分类号 G01R31/28;G01R31/316;G01R31/3185;H01L21/66;H01L21/822;H01L27/00;H01L27/04 主分类号 G01R31/28
代理机构 代理人
主权项
地址