| 摘要 |
<p>In a circuit arrangement wherein a memory matrix and an address decoder are constructed of read only memories (ROMs), a semiconductor read only memory is characterized in that at least the address decoder ROM in which the number of output lines to be selected is smaller than that of output lines not be selected is made of a longitudinal system in which a plurality of MISFETs are connected in series between respective output lines arranged in a column and a reference voltage terminal, the MISFETs forming a desired pattern in a row, and that current is permitted to flow through only a load MISFET connected with a selected one of the address select lines.</p> |
