发明名称 SIGNAL SEPARATING CIRCUIT
摘要 PURPOSE:To eliminate an error caused by the uneven rotations of a magnetic disk, by producing a window signal through the specified period among all periods of a counter from the time of arrival of a data signal and a clock signal when separating these signals which are recorded on the magnetic disk, etc. CONSTITUTION:A preset counter 5 of 16 notation uses, e.g. SN74191 of the Texas Company, and preset inputs A-D plus count outputs QA-QD are provided with Q and QA, B and QB, D and QD plus C and CQ as weights 1, 2, 4 and 8 respectively. The counter 5 performs the counting with a clock signal CK to be supplied, and the states of the inputs A-D are set to the counter 5 with input of a load signal LO. Based on the set value, the counting is carried out. The data signal, the clock signal and the output QD, i.e. the window signal are supplied to a data separator 6 to separate the data signal. The output QD is set so as to be produced in a 1/4 or 3/4 counter period at the time when the data and clock signals arrive.
申请公布号 JPS5744209(A) 申请公布日期 1982.03.12
申请号 JP19800120915 申请日期 1980.08.29
申请人 SHARP KK 发明人 NAKAGAWA HIROMITSU
分类号 H03M5/04;G11B5/09;G11B20/14;H03K5/00;H03K5/153;H03M5/12;H04L7/02;H04L7/08;H04L25/40;H04L25/49 主分类号 H03M5/04
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