| 摘要 |
PURPOSE:To remarkably reduce the burden in a CPU, by providing an exclusive processor operated through the reception of a microprogram and accessory circuit with a failure information receiver. CONSTITUTION:When a control area assigned to a slave station 4A-11 is read out, if the slave station connecting information is connectable, a control information and an address information selecting the slave station 4A-11 and a slave station control circuit 3A-1 are transmitted to slave station control circuits 3A-1-3A-N. After this selected circuit 3A-1 inspects the control information, the control information is transmitted to the slave station 4A-11 according to the address information. Thereafter, an exclusive processor 9 receives the failure information from the slave station 4A-11 at the failure information reception processing via the circuit 3A-1 for error check and failure information analysis, and if required, this failure information is stored in the slave station control area and transmits it to a CPU1. |
