| 摘要 |
PURPOSE:To keep stable operation for logical circuit groups, by switching the output of a clock oscillation circuit, when the distortion of phase is absent at the output before and after the clock switching of the clock oscillation circuit. CONSTITUTION:Normal signals A, B are compared at a normal state, and when they coincide, the state is displayed to a flip-flop 14 with a signal H. When the switching of clock is indicated with a switching signal C, the flip-flop 14 samples the state of the signal H with a timing signal G and it is set to 1 when the phase is in coincidence and if not, it is set to 0. When set to 1, a switching circuit 3 selects an output signal B of a clock oscillation circuit 2 and the clock switching operation is finished by applying the signal D to a logical circuit group 5. Thus, the operation of the logical circuit group 5 is not interrupted. |
