| 摘要 |
<p>A data processing device comprising a first switch, a first quasi-static storage, a second switch, and a second quasi-static storage, all series-connected, a control unit coupled to the switches and the quasi-static storages, an input unit inserted between an input bus and the first switch, and three comparators coupled to respective quasistatic storages one of which connects output buses and to a respective output bus.</p> |
| 申请人 |
ERSHOV, ARTEMY M.;ZORINA, NADEZHDA A.;KAZMIN, EVGENY V.;SERGEEV, ALEXANDR S.;PODBORONOV, BORIS P.;RAIKHER, VENIAMIN L. |
发明人 |
ERSHOV, ARTEMY M.;ZORINA, NADEZHDA A.;KAZMIN, EVGENY V.;SERGEEV, ALEXANDR S.;PODBORONOV, BORIS P.;RAIKHER, VENIAMIN L. |
