| 摘要 |
PURPOSE:To relieve intermittent error correction disable failure at partial byte write-in on a main memory, by using a cash memory. CONSTITUTION:When an error correction disable failure with a write-in request to a main memory 105 is reported 120 to a failed address control circuit 115, an error correction disable write-in failure report 122 is made to an execution unit 102. As a result, an error correction disable write-in failure processing firmware is started and readout request is made to a cash memory in a failed address 123. If the corresponding data is absent in the cash memory, the production of error correction disable and retrial disable failure is reported the same as the case with conventional methods, but if the data is present, the data is taken as write-in data and the failure address is taken as the write-in address, and the entire byte write-in request is outputted to correct the data of a main memory causing intermittent failure correctly. |
