发明名称 |
METHOD OF PRODUCING SEMICONDUCTOR DEVICE |
摘要 |
A method for providing high density dynamic memory cells which provides self-alignment of both V-MOSFET device elements and their interconnections through the use of a device-defining masking layer having a plurality of parallel thick and thin regions. Holes are etched in portions of the thin regions with the use of an etch mask defining a plurality of parallel regions aligned perpendicular to the regions in the masking layer. V-MOSFET devices having self-aligned gate electrodes are formed in the holes and device interconnecting lines are formed under the remaining portions of the thin regions. A combination of anisotropic etching and directionally dependent etching, such as reaction ion etching, may be used to extend the depth of V-grooves. A method of eliminating the overhang of a masking layer after anisotropic etching includes the oxidation of the V-groove followed by etching to remove both the grown oxide and the overhang is also disclosed. |
申请公布号 |
JPS5734367(A) |
申请公布日期 |
1982.02.24 |
申请号 |
JP19810081233 |
申请日期 |
1981.05.29 |
申请人 |
IBM |
发明人 |
DONARUDO MATSUKARUPIN KENII |
分类号 |
H01L27/10;H01L21/306;H01L21/768;H01L21/8242;H01L27/108;H01L29/74;H01L29/749;H01L29/78 |
主分类号 |
H01L27/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|