发明名称 MULTILAYER IC SUBSTRATE
摘要 Provided are a process for making and a structure of a multilayer integrated circuit substrate having improved via connection. A first layer M1 (20-22) of chrome-copper-chrome is applied to a ceramic substrate (19) and the circuits etched. A polyimide layer (23) is then applied, cured, and developed and etched to provide via holes in the polyimide layer down to the M1 circuitry. The top chrome (22) is now etched to expose the M1 copper (21) in the via holes. Next, a coating of tin (27) is applied to all exposed copper surfaces. This is followed by evaporation of a second layer M2 (24-26) of chrome-copper-chrome and during the evaporation cycle, the tin is in a molten state which causes the chrome to break up as it is deposited and migrates some of the chrome to the periphery of the vias. As a result, a tin interface is formed which provides a metallurgical bond between the M1 copper (21) and the M2 copper (25).
申请公布号 JPS5730356(A) 申请公布日期 1982.02.18
申请号 JP19810081234 申请日期 1981.05.29
申请人 发明人
分类号 H01L21/48;H01L23/12;H01L23/15;H01L23/538;H05K1/03;H05K3/40;H05K3/46 主分类号 H01L21/48
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