发明名称 SEMICONDUCTOR MEMORY CELL
摘要 PURPOSE:To improve the stability in the operation of a semiconductor memory cell by performing a reading operation with a direct current and constructing to eliminate the variation in the potential of a gate region in which charge is stored. CONSTITUTION:A writing operation is performed, for example, by setting an address line 115 to approx. -5V, conducting a P type channel first MOSFET and charging and discharging P type regions 103, 104 electrically floated through the first MOSFET. When the writing line 113 is set to approx. lower than -4V, the regions 103, 109 become approx. -4V to write ''1'', while when it is set to approx. 0V, ''0'' is written. In the memory cells in which no reading nor writing operation are carried out, the address line 115 is maintained at approx. 0V. In this case, the first and second MOSFETs of the memory cell are in nonconductive state, and the states of the lines 113, 114 do not affext the influence to the regions 103, 109.
申请公布号 JPS5730362(A) 申请公布日期 1982.02.18
申请号 JP19800104525 申请日期 1980.07.30
申请人 NIPPON ELECTRIC CO 发明人 TERADA KAZUO
分类号 H01L27/108;G11C11/412;H01L21/8242;H01L27/10;H01L29/78 主分类号 H01L27/108
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