| 摘要 |
A voltage comparitor or level detector comprises a differential amplifier the input terminals of which are formed by the gates of two IGFET's Q1, Q2 which have different threshold voltages due to the use of differently doped semiconductor material for their gate electrodes. This structure provides a stable input offset for the amplifier which is used as a reference. The input voltage and a reference level are applied to the input terminals and the output of the amplifier is determined by the difference between the input p.d. and the input offset. The values of the source currents I1, I2 may be adjusted to provide temperature compensation. In an alternative arrangement the input transistors Q1, Q2 are arranged in a common source configuration with constant current drain supplies. The arrangement may be used as a battery voltage level detector by applying the battery voltage (via a potential divider) to one input and a fixed level (e.g. VDD or VSS) to the other input. Circuits incorporating such arrangements for providing low battery indication e.g. for an electronic timepiece are described. <IMAGE> |
