发明名称 DEVICE FOR SPEED CONTROL AND AMPLIFICATION
摘要 PURPOSE:To reduce the overshooting of a speed control signal by a method wherein the capacitor on the feedback circuit of the arithmetic operational amplifier on a compensating circuit is short-circuited in proportion to the output voltge of the compensating circuit. CONSTITUTION:A speed error detector 11 gives the difference between a speed command signal and a speed feedback signal to the compensating circuit 12. The compensating circuit 12 performs a proportional and integral control using the arithmetic operational amplifier 31, the feedback resistors 33 and 34 and the capacitor 32, and supplies the above to a servomotor 14 through the intermediary of a power amplifier 13. When the output voltage of the compensating circuit 12 is increased, a wind comparator 21 outputs a positive voltage, with which the capacitor 32 is short-circuited by conducting a switching element 22 and the gain of the arithmetic operational amplification circuit is reduced. Through these procedures, the overshooting of the speed controlling signal is reduced and the stabilized speed control of a DC servomotor can be performed.
申请公布号 JPS5728584(A) 申请公布日期 1982.02.16
申请号 JP19800103051 申请日期 1980.07.29
申请人 FUJITSU FANUC LTD 发明人 KOBARI YOSHIO;HACHISUGA YOSHIAKI
分类号 H02P7/06 主分类号 H02P7/06
代理机构 代理人
主权项
地址